Sr Principal Analog Design Engineer

onsemi is seeking a self-driven and motivated professional with experience in analog circuit design and analog IP development to join the System Resources (SRSS) IP Center-Of-Excellence (CoE) in the Analog Mixed Signal Group (AMG). AMG designs and develops power management and sensor interface integrated circuits targeting the Automotive, Industrial, and Cloud/Computing end markets. As a Principal Analog Design Engineer (TL) in the SRSS IP CoE, you will be working in a world-class team of professionals focused on the development of power-management (PMU) and clock management (CMU) IP sub-systems for the Treo Platform. These sub-systems will be used in products from multiple product lines across multiple business units as well as standalone discrete products.

• BS in Electrical Engineering or related with 15+ years of experience, or MS and 12+ years of experience in analog circuit design and layout.
• The ideal candidate should have a thorough understanding of analog circuits for clock and power management to accurately and efficiently collaborate with all members of the technical staff, both analog and digital, regarding overall project development progress and status.
• Strong fundamental knowledge of analog circuits and ability to write analog behavioral models is a must.
• Solid experience with Cadence Virtuoso, Incisive, AMS-Designer, Verilog-AMS.
• Solid experience with behavioral modeling languages: Verilog-A, Verilog-AMS, Verilog-HDL, System Verilog.
• Knowledge of scripting languages such as Python, PERL, TCL, and MATLAB.
• Basic understanding of RTL design, CDC, ASIC synthesis, P&R, timing analysis etc.
• Experience in developing ASIC/Mixed signal ICs as part of a larger team.
• Analog design experience and proficiency in verification, documentation, and post-silicon characterization and validation. Includes deep understanding of integrated circuit design such as amplifiers, filters, BGAP circuits, oscillators etc.
• Develop automated test benches and simulation results evaluation tools for top-down block and system level verification.
• Write design and verification specifications, design verification plans, and documentation.
• Conduct design verification reviews to ensure that functional requirements are met.
• Provide peer review to other engineers.
• In-depth knowledge of semiconductor devices like MOS transistors, BJTs etc.
• Knowledge with behavioral top-level modeling and mixed signal verification methodology.
• Knowledge of UNIX/Linux working environment.
• Excellent written and oral communication.
• Proven ability to work independently and in teams.
• Willing to travel as required by the role.

• onsemi’s System Resources (SRSS) IP Center of Excellence is hiring an experienced analog designer to help us develop IP(s) & sub-systems for next generation Automotive, Industrial & Medical products. The successful candidate will work on several types of analog circuits / IP blocks. Experience with clock and power management circuit design is highly desirable. An analytical approach to problem solving is required. CMOS designs provide challenging learning opportunities where performance, power and reliability are all pushed to the limit while maintaining product execution schedule.
• Close collaboration with system architects and product definers to capture requirements for analog circuit IP that can be scaled for different needs and reused across various product types.
• Understanding of mixed-signal design concepts like clock jitter, voltage levels and their impact in a digital system.
• Deep understanding of operating principals of analog building blocks like PLLs, clock circuits, power management circuits, LDOs, power-on-reset modules etc. and ability to create behavioral models of such IPs.
• The candidate will be able to work as part of a large and focused team of engineers and will be able to collaborate successfully as needed with design architects, digital design and verification, project management, and digital and analog design teams in multiple worldwide geographies.
• Implement micro-architecture to circuit implementation with the refining of features requirements throughout the design process.
• Part of a team that collectively owns the technical outcome of design, verification, implementation, and execution of Power Management ICs with complexities that can span from simple power converters to complex designs, control loops, and digital interfaces.
• Understand project goals, execute with realistic schedule, report status of progress and understand clarity of project details and milestones.
• Get involved in Customer issues, production issues, FW and System development, Failure Analysis.
• Support post-silicon characterization and validation activities for your designs.
• Mentor junior engineers.