Staff Digital Design Engineer - Core Platform Ip

Job Summary:

onsemi is seeking a self-driven and motivated professional with experience of digital design and IP development to join the Core Platform IP Center-Of-Excellence (CoE) organization in the Analog Mixed Signal Group (AMG). AMG designs and develops power management and sensor interface integrated circuits targeting the Automotive, Industrial, and Cloud/Computing end markets. As a Digital Design Engineer in the Core Platform IP organization, you will be part of a team working on the development of digital compute, power-management (PMU) and clock management (CMU) IP sub-systems for the Treo Platform. These sub-systems will be used in products from multiple product lines across multiple business units as well as standalone discrete products.

Qualifications/Requirements

• BS in Electrical Engineering or related + 4 years of experience, or MS + 2 experience in Digital Design and Verification.
• The ideal candidate should have experience of the end-to-end digital design flow in order to accurately and efficiently collaborate with all members of the technical staff, both analog and digital, regarding overall project development progress and status.
• Experience of RTL design, CDC, ASIC synthesis, timing analysis and CDC, P&R, UPF, ATPG generation and system Verilog (assertion).
• Experience of Verilog, TCL and Perl/Python/XML programming language.
• Basic understanding of analog integrated circuit design such as amplifiers, filters, BGAP circuits, oscillators etc.
• Knowledge of semiconductor devices like MOS transistors, BJTs etc.
• Knowledge of behavioral top-level modeling and mixed signal verification methodology.
• Knowledge of UNIX/Linux working environment.
• Knowledge of multiple semiconductor design tools like Matlab, Spectre, Spice, Cadence design environment. AMS simulation experience is a plus.
• Excellent written and oral communication.
• Proven ability to work independently and in teams.

Performance Objectives:

onsemi’s System Resources IP Center of Excellence is hiring an experienced digital design engineer to help us develop IP(s) & sub-systems for next generation Automotive, Industrial & Medical products. The successful candidate will work on the design and development of state machines and control systems of digital IPs or complex mixed-signal sub-systems comprises of several analog and digital blocks. Experience with mixed signal simulation, verilog modelling and signal path optimization is required. Analytical approach to problem solving is required. CMOS designs provide challenging learning opportunities where performance, power and reliability are all pushed to the limit while maintaining product execution schedule.

• Close collaboration with system architects and product definers to develop RTL that can be scaled for different needs and reused across various product types.
• Understanding of mixed-signal design concepts like clock jitter, voltage levels and their impact in a digital system.
• Basic understanding of operating principal of analog building blocks like PLLs, power-on-reset modules, clocking circuits etc. and ability to create behavioral model of such IPs.
• Define standard interfaces across digital systems or mixed signal systems focusing on future extension and reusability.
• The candidate will work on digital design architecture implementation, low power design, synthesis and timing analysis.
• Implement Digital On Top (DOT) for SoC design using sub-system IPs and analog IPs.
• The candidate will be able to work as part of a large and focused team of engineers and will be able to collaborate successfully as needed with design architects, digital verification, project management, and digital and analog design teams in multiple worldwide geographies.
• Implement micro-architecture to RTL implementation with the refining of features requirements throughout the design process.
• Works with validation team for pre-silicon platforms like SOCV, Emulation, FPGA.
• Owns technical outcome of design, verification, implementation, and execution of Power Management ICs with complexities that can span from simple power converters to complex designs, control loops, and digital interfaces.
• Understand project goals, execute with realistic schedule, report status of progress and understand clarity of project details and milestones.
• Support post-silicon validation activities for your designs.
• Perform other duties as required.